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W74M12FV 3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & SECURE AUTHENTICATION -0- Publication Release Date: November 18, 2016 Preliminary - Revision D W74M12FV Table of Contents GENERAL DESCRIPTIONS ............................................................................................................. 3 FEATURES ....................................................................................................................................... 3 PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 4 Pin Configuration SOIC 208-mil ........................................................................................... 4 Pin Description SOIC 208-mil ............................................................................................... 4 PIN DESCRIPTIONS ........................................................................................................................ 6 Chip Select (/CS) .................................................................................................................. 6 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 6 Serial Clock (CLK) ................................................................................................................ 6 BLOCK DIAGRAMS.......................................................................................................................... 7 Operation Diagram ............................................................................................................... 7 Functional Block Diagram .................................................................................................... 7 FUNCTIONAL DESCRIPTIONS ....................................................................................................... 8 Authentication Flash Operations .......................................................................................... 8 6.1.1 6.1.2 6.1.3 6.1.4 Authentication Flash Initialization ............................................................................................ 8 Authentication Flash Operation Flow ...................................................................................... 9 Operations Allowed / Disallowed to Authentication Flash ..................................................... 10 Authentication Flash Status Register Definition .................................................................... 11 Instruction Set Tables ......................................................................................................... 12 6.2.1 6.2.2 6.2.3 Instruction Set Table 2-1 (Authentication Flash Input Instruction, OP1)(1)............................. 12 Instruction Set Table 2-2 (Authentication Flash Output Instruction, OP2)(1) .......................... 12 Instruction Set Table 2-3 (Authentication Flash Reset Instruction)(1) .................................... 12 Instruction Descriptions ...................................................................................................... 13 6.3.1 6.3.2 6.3.3 6.3.4 6.3.5 6.3.6 6.3.7 Write Root Key Register (9Bh + 00h).................................................................................... 13 Update HMAC Key (9Bh + 01h) ............................................................................................ 14 Increment Monotonic Counter (9Bh + 02h) ........................................................................... 15 Request Monotonic Counter (9Bh + 03h) ............................................................................. 16 Reserved Authentication Flash Device Commands (9Bh + 04h~FFh) .................................. 16 Read Authentication Flash Device Status / Data (96h) ......................................................... 17 Enable Reset (66h) and Reset Device (99h) ........................................................................ 18 ELECTRICAL CHARACTERISTICS(1) ............................................................................................ 19 Absolute Maximum Ratings (2) .......................................................................................... 19 Operating Ranges .............................................................................................................. 19 Power-Up Power-Down Timing and Requirements ........................................................... 20 DC Electrical Characteristics(1,2) ......................................................................................... 21 AC Measurement Conditions ............................................................................................. 22 AC Electrical Characteristics(3,4) ......................................................................................... 23 Serial Output Timing Diagram ............................................................................................ 25 Serial Input Timing Diagram ............................................................................................... 25 PACKAGE SPECIFICATIONS ....................................................................................................... 26 -1- W74M12FV 8-Pin SOIC 208-mil (Package Code SS) ............................................................................ 26 Ordering Information........................................................................................................... 28 Valid Part Numbers and Top Side Marking ........................................................................ 29 GENERAL INSTRUCTIONS ........................................................................................................... 29 REVISION HISTORY ...................................................................................................................... 30 -2- Publication Release Date: November 18, 2016 Preliminary - Revision D W74M12FV GENERAL DESCRIPTIONS The W74M12FV (128M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The W74M series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with low current consumption. All devices are offered in space-saving packages. The W74M12FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2, and I/O3. SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416 (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The device supports JEDEC standard manufacturer and device ID and SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers. The W74M product line includes a standard Hash-based Message Authentication Code (HMAC) SHA-256 crypto accelerator that is used for key establishment between devices or systems for secure authentication. Secure authentication is accomplished by using Root Keys and session based, HMAC Keys secretly shared between the host and the flash memory. Each W74M device is equipped with four sets of non-volatile 256-bit for storing Root Keys; four sets of volatile 256-bit for storing HMAC Keys and four sets of non-volatile 32-bit for storing Monotonic Counter values. The four sets allows one device pairing up to four different Hosts. A Host can be another device, like a microprocessor, or a system. Each Monotonic Counter, paired with a host, share a unique counter value (N) that can increment, N+1. The Host dictates the random number and incremental rate at the start of its first pairing. The constant changing counter value is a method to combat device counterfeiting and Replay attacks. FEATURES  New Family of SpiFlash Memories – W74M12FV: 128M-bit / 16M-byte – Standard SPI: CLK, /CS, DI(IO0), DO(IO1) – Dual SPI: CLK, /CS, IO0, IO1 – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – Software Reset  Flexible Architecture with 4KB sectors – Uniform Sector/Block Erase (4K/32K/64K-Byte) – Program 1 to 256 byte per programmable page – Erase/Program Suspend & Resume  Highest Performance of SpiFlash – 104MHz Single, Dual/Quad SPI clocks – 208/416MHz equivalent Dual/Quad SPI – 50MB/S continuous data transfer rate – Min. 100,000 erase/program cycles – More than 20-year data retention  Low Power, Wide Temperature Range – Single 2.7 to 3.6V supply – 4mA active current,